HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 403

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

13.2.5
MCCR is an 8-bit readable/writable register that controls the operation of the memory clock on/off
in sleep mode. MCCR is initialized at power-on reset but retains the previous value after manual
reset.
Bit
7 to 3
2
1
0
Memory Clock Control Register (MCCR)
Bit Name

UMCLKC
XYMCLKC 0

Initial Value R/W
All 0
0
0
R
R/W
R/W
R
Description
Reserved
These bits are always read as 0. The write value
should always be 0. If 1 is written to these bits,
correct operation cannot be guaranteed.
U Memory Clock Control
Controls the U memory on/off in sleep mode
0: U memory clock off in sleep mode
1: U memory clock on in sleep mode
When this bit is set to 1, it is possible to access the
U memory with DMAC and USBH in sleep mode.
Note: When changing the clock frequency
X/Y Memory Clock Control
Controls the X/Y memory on/off in sleep mode
0: X/Y memory clock off in sleep mode
1: X/Y memory clock on in sleep mode
When this bit is set to 1, it is possible to access the
X/Y memory with DMAC and USBH in sleep mode.
Note: When changing the clock frequency
Reserved
This bit is always read as 0. The write value should
always be 0. If 1 is written to this bit, correct
operation cannot be guaranteed.
multiplication ratio, clear UMCLKC bit to 0.
There is the restriction on the interrupt
processing when this function is used. Refer to
section 7, U Memory for details.
multiplication ratio, clear XYMCLKC bit to 0.
There is the restriction on the interrupt
processing when this function is used. Refer to
section 6, X/Y Memory for details.
Rev. 1.00, 02/04, page 365 of 804