HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 276

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
• CS4WCR
Rev. 1.00, 02/04, page 238 of 804
Bit
6
5 to 0
Bit
31 to 18 
17
16
15 to 13 
12
11
Bit Name
WM
Bit Name
BW1
BW0
SW1
SW0
Initial
Value
0
All 0
Initial
Value
All 0
0
0
All 0
0
0
R/W Description
R/W External Wait Mask Specification
R
R/W Description
R
R/W
R/W
R
R/W
R/W
Specify whether or not the external wait input is valid. The
specification by this bit is valid even when the number of
access wait cycle is 0.
0: External wait input is valid
1: External wait input is ignored
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, correct operation
cannot be guaranteed.
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, correct operation
cannot be guaranteed.
Number of Burst Wait Cycles
Specify the number of wait cycles to be inserted between
the second or later access cycles in burst access.
00: 0 cycles
01: 1 cycle
10: 2 cycles
11: 3 cycles
Reserved
These bits are always read as 0. The write value should
always be 0. If 1 is written to these bits, correct operation
cannot be guaranteed.
Number of Delay Cycles from Address, CSn Assertion to
RD, WE Assertion
Specify the number of delay cycles from address and CSn
assertion to RD and WE assertion.
00: 0.5 cycles
01: 1.5 cycles
10: 2.5 cycles
11: 3.5 cycles

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