HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 283

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HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
9.4.5
RTCSR is a 32-bit readable/writable register that specifies various items about refresh for
SDRAM. When the RTCSR is written, the upper 16 bits of the write data must be H′A55A to
cancel write protection.
Bit
31 to 8
7
6
5
4
3
Refresh Timer Control/Status Register (RTCSR)
Bit Name
CMF
CKS2
CKS1
CKS0
Initial
Value
All 0
0
0
0
0
0
R/W Description
R
R/W Compare Match Flag
R
R/W
R/W
R/W
Write Protection
These bits are always read as 0. When writing to these bits,
the upper 16-bit of the write data should be H′A55A to cancel
write protection. The lower 8-bit is should always be 0. If
other value is written to these bits, correct operation cannot
be guaranteed.
Indicates that a compare match occurs between the refresh
timer counter (RTCNT) and refresh time constant register
(RTCOR). This bit is set or cleared in the following
conditions.
0: Clearing condition: When 0 is written in CMF after reading
1: Setting condition: When the condition RTCNT = RTCOR is
Reserved
This bit is always read as 0. The write value should always
be 0. If 1 is written to this bit, correct operation cannot be
guaranteed.
Clock Select
Select the clock input to count-up the refresh timer counter
(RTCNT).
000: Stop the counting-up
001: Bφ/4
010: Bφ/16
011: Bφ/64
100: Bφ/256
101: Bφ/1024
110: Bφ/2048
111: Bφ/4096
out RTCSR during CMF = 1.
satisfied.
Rev. 1.00, 02/04, page 245 of 804

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