HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 353

no-image

HD6417660

Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
10.4.2
The repeat mode of DMAC can be used by setting 1 to the RPT bit of the CHCR_n register. When
the repeat mode is set and data transfer ends (DMATCR_n becomes 0), the DEI interrupt is
generated if the IE bit of CHCR_n is set, and then the value of IAR_n is copied onto SAR_n or
DAR_n specified by RAS bit of CHCR_n, and DMATCR_n is restored to an initial value. DMA
transfer can be executed continuously when the TE bit of the CHCR_n register is cleared to 0.
10.4.3
DMA transfer requests are basically generated in either the data transfer source or destination, but
they can also be generated by devices and on-chip peripheral modules that are neither the source
nor the destination. Transfers can be requested in three modes: auto request, external request, and
on-chip module request. The request mode is selected in the RS3 to RS0 bits of the DMA channel
control registers 0 to 3 (CHCR_0 to CHCR_3), and the DMA extension resource selectors 0 and 1
(DMARS0 and DMARS1).
Auto-Request Mode: When there is no transfer request signal from an external source, as in a
memory-to-memory transfer or a transfer between memory and an on-chip peripheral module
unable to request a transfer, the auto-request mode allows the DMAC to automatically generate a
transfer request signal internally. When the DE bits of CHCR_0 to CHCR_3 and the DME bit of
the DMAOR are set to 1, the transfer begins so long as the TE bits of CHCR_0 to CHCR_3 and
the NMIF bit of DMAOR are all 0.
External Request Mode: In this mode a transfer is performed at the request signal (DREQ) of an
external device. This is valid only for DMA channel 0. Choose one of the modes shown in table
10.3 according to the application system. When this mode is selected, if the DMA transfer is
enabled (DE = 1, DME = 1, TE = 0, AE = 0, NMIF = 0), a transfer is performed upon a request at
the DREQ input.
Table 10.3 Selecting External Request Modes with the RS Bits
RS3
0
0
DMA Transfer Requests
RS2
0
0
Repeat Mode Transfer
RS1
0
1
RS0
0
0
1
Address Mode
Dual address
mode
Single address
mode
Source
Any
External memory,
memory-mapped
external device
External device with
DACK
Rev. 1.00, 02/04, page 315 of 804
Destination
Any
External device with
DACK
External memory,
memory-mapped
external device

Related parts for HD6417660