HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 307

• Manufacturer Part Number: HD6417660
• Description: Renesas 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Single Read: A read access ends in one cycle when data exists in non-cacheable region and the
data bus width is larger than or equal to access size. As the burst length is set to 1 in synchronous
SDRAM burst read/single write mode, only the required data is output. Consequently, no
unnecessary bus cycles are generated even when a cache-through area is accessed.
Figure 9.14 shows the single read basic timing.
Figure 9.14 Single Read Wait Specification Timing (Auto Pre-charge)
D15 to D0
A23 to A0
DACK*
Notes: 1. Address pin to be connected to the A10 pin of SDRAM.
RD/WR
DQMn
A11*
CKIO
RAS
CAS
CS3
BS
2. The waveform for DACK is when active low is specified.
1
2
Tr
Tc1
Td1
Tde
Rev. 1.00, 02/04, page 269 of 804
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