HD6417660 RENESAS [Renesas Technology Corp], HD6417660 Datasheet - Page 552
HD6417660
Manufacturer Part Number
HD6417660
Description
Renesas 32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417660.pdf
(846 pages)
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Rev. 1.00, 02/04, page 514 of 804
Bit
5
4
3
Bit Name
BLE
CLE
IE
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Bulk List Enable
This bit is set to enable the processing of the bulk list in
the next frame. The host controller checks this bit when
the processing of the list has been determined. When
disabling, the host controller driver can correct the list.
When the HcBulkCurrentED register indicates ED* to be
deleted, the host controller driver should hasten the
pointer by updating the HcBulkCurrentED register before
re-enabling the list processing.
0: Bulk list processing is not carried out.
1: Bulk list processing is carried out.
Control List Enable
This bit is set to enable the processing of the control list
in the next frame. If cleared by the host controller driver,
the processing of the control list is not carried out after
next SOF. The host controller must check this bit
whenever the list will be processed. When disabling, the
host controller driver can correct the list. When the
HcControlCurrentED register indicates ED to be deleted,
the host controller driver should hasten the pointer by
updating the HcControlCurrentED register before re-
enabling the list processing.
0: Control list processing is not carried out.
1: Control list processing is carried out.
Isochronous Enable
This bit is used by the host controller driver to
enable/disable the processing of isochronous ED. While
processing the periodic list in the frame, the host
controller will check the status of this bit when it finds an
isochronous ED (F = 1). If set (enabled), the host
controller continues to process ED. If cleared (disabled),
the host controller stops the processing of the periodic list
(currently includes only isochronous ED) and starts to
process the bulk/control list. Setting this bit is guaranteed
to be valid in the next frame (not in the current frame).
0: Isochronous ED processing is not carried out.
1: Isochronous ED processing is carried out.
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