PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 117

• Manufacturer Part Number: PEF2256
• Description: E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

4.6
4.6.1
The FALC
binary sequences (PRBS). The generated PRBS pattern is transmitted to the remote end
on pins XL1/2 or XDOP/N and can be inverted optionally. Generating and monitoring of
PRBS pattern is done according to ITU-T O.151.
The PRBS monitor senses the PRBS pattern in the incoming data stream.
Synchronization is done on the inverted and non-inverted PRBS pattern. The current
synchronization status is reported in status and interrupt status registers. Enabled by bit
LCR1.EPRM each PRBS bit error increments an error counter (CEC2). Synchronization
is reached within 400 ms with a probability of 99.9% at a bit error rate of up to 10
The PRBS generator and monitor can be used to handle either a framed
(TPC0.FRA = 1) or an unframed (TPC0.FRA = 0) data stream.
4.6.2
In the remote loop-back mode the clock and data recovered from the line inputs RL1/2
or RDIP/RDIN are routed back to the line outputs XL1/2 or XDOP/XDON through the
analog or digital transmitter. As in normal mode they are also processed by the
synchronizer and then sent to the system interface. The remote loop-back mode is
selected by setting the corresponding control bits LIM1.RL and LIM1.JATT. Received
data can be looped with or without the transmit jitter attenuator (FIFO).
Figure 40
User’s Manual
Hardware Description
RL1
RL2
XL1
XL2
XCLK
®
Test Functions (E1)
Pseudo-Random Binary Sequence Generation and Monitor
Remote Loop
56 has the ability to generate and monitor 2
Remote Loop (E1)
Clock +
Data
Recovery
MUX
MUX
RCLK
RCLK
DCO-R/X
117
FIFO
Rec.
Framer
Trans.
Framer
15
-1 and 2
Functional Description E1
Elast.
Store
Elast.
Store
20
-1 pseudo-random
DS1.1, 2003-10-23
PEF 2256 H/E
ITS09750
FALC
RDO
XDI
-1
.
®
56