PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 31

• Manufacturer Part Number: PEF2256
• Description: E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 2
Pin or
Ball No.
2 (B1)
User’s Manual
Hardware Description
Name
RL2
RDIN
RCLKI
Pin Definitions - Line Interface (cont’d)
Pin
Type
I
I
I
analog Line Receiver Input 2
Buffer
Type
digital
digital
Function
Analog input from the external transformer.
Selected by LIM1.DRS = 0
Receive Data Input Negative
Digital input for received dual-rail PCM(-)
route signal which is latched with the
internally recovered receive route clock. An
internal DPLL extracts the receive route clock
from the incoming data pulses. The duty cycle
of the received signal has to be close to 50%.
The dual-rail mode is selected if
LIM1.DRS = 1
Input polarity is selected by bit RC0.RDIS
(active low by default), line coding is selected
by FMR0.RC(1:0)
Receive Clock Input
Receive clock input for the optical interface if
LIM1.DRS = 1
The clock frequency is 2.048 MHz (E1) or
1.544 MHz (T1/J1). RCLKI is ignored if CMI
coding is selected.
31
B
B
and FMR0.RC1 = 1
and FMR0.RC(1:0) = 00
B
.
External Signals
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
B
.
B
.
®
56