PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 35

• Manufacturer Part Number: PEF2256
• Description: E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 3
Pin or
Ball No.
77 (C3)
User’s Manual
Hardware Description
Name
CLK2
Pin Definitions - Clock Interface (cont’d)
Pin
Type
O
Buffer
Type
PU
Function
DCO-X Clock Output
Output of the de-jittered system clock
generated by the DCO-X circuit. Frequency
selection is done by setting control bits in
PC5/6. Selectable frequencies are:
E1: 16.384 MHz, 8.192 MHz, 4.096 MHz or
2.048 MHz
T1/J1: 12.352 MHz, 6.176 MHz, 3.088 MHz
or 1.544 MHz
After reset this output is inactive and
internally pulled high.
Note: If DCO-X is not used, no clock is driven
35
on pin CLK2 (SIC1.XBS(1:0) = 00
CMR1.DXJA = 1
no jitter attenuation)
B
; buffer bypass and
External Signals
DS1.1, 2003-10-23
PEF 2256 H/E
FALC
B
and
®
56