PEF2256 INFINEON [Infineon Technologies AG], PEF2256 Datasheet - Page 354
![no-image](/images/no-image-200.jpg)
PEF2256
Manufacturer Part Number
PEF2256
Description
E1/T1/J1 Framer and Line Interface Component for Long- and Short-Haul Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.PEF2256.pdf
(518 pages)
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User’s Manual
Hardware Description
Note: During the transmission of the XFIFO content, the SYPX or
format with frame 26. The first byte in XFIFO is transmitted in
the first time slot selected by TTR(4:1) and so on.
After receiving a complete multiframe in the time slot mode
(RTR(4:1)) an ISR0.RME interrupt is generated, if no HDLC or
BOM
(CCR1.EDLX/EITS = 10) XMFA is not valid.
XMFS interval time should not be changed, otherwise the
XFIFO data has to be retransmitted.
mode
354
is
enabled.
In
DL-bit
DS1.1, 2003-10-23
T1/J1 Registers
PEF 2256 H/E
FALC
access
®
56
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