HD6432646 Hitachi, HD6432646 Datasheet - Page 1002

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

IER—IRQ Enable Register
ISR—IRQ Status Register
968
Note: * Only 0 can be written, to clear the flag.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
IRQ5 to IRQ0 Flags
R/(W)*
0
1
R/W
—
—
7
0
7
0
[Clearing conditions]
• Cleared by reading IRQnF when IRQnF = 1, then writing 0 to IRQnF flag
• When interrupt exception handling is executed while low-level detection
• When IRQn interrupt exception handling is executed while falling, rising,
• When the DTC is activated by an IRQn interrupt, and the DISEL bit in
[Setting conditions]
• When IRQn input goes low when low-level detection is set
• When a falling edge occurs in IRQn input when falling edge detection is
• When a rising edge occurs in IRQn input when rising edge detection is
• When a falling or rising edge occurs in IRQn input when both-edge
is set (IRQnSCB = IRQnSCA = 0) and IRQn input is high
or both-edge detection is set (IRQnSCB = 1 or IRQnSCA = 1)
MRB of the DTC is cleared to 0
(IRQnSCB = IRQnSCA = 0)
set (IRQnSCB = 0, IRQnSCA = 1)
set (IRQnSCB = 1, IRQnSCA = 0)
detection is set (IRQnSCB = IRQnSCA = 1)
R/(W)*
R/W
—
—
6
0
6
0
IRQ5E
R/(W)*
IRQ5F
IRQ5 to IRQ0 Enable
R/W
0
1
5
0
5
0
IRQn interrupts disabled
IRQn interrupts enabled
R/(W)*
IRQ4E
IRQ4F
R/W
4
0
4
0
H'FE14
H'FE15
R/(W)*
IRQ3E
IRQ3F
R/W
3
0
3
0
(n = 5 to 0)
R/(W)*
IRQ2E
IRQ2F
R/W
2
0
2
0
Interrupt Controller
Interrupt Controller
R/(W)*
IRQ1E
IRQ1F
R/W
1
0
1
0
(n = 5 to 0)
R/(W)*
IRQ0E
IRQ0F
R/W
0
0
0
0