HD6432646 Hitachi, HD6432646 Datasheet - Page 576

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

15.2.6
The transmit wait cancel register (TXCR) is a 16-bit readable/writable register that controls
cancellation of transmit wait messages in mailboxes (buffers).
Bits 15 to 9 and 7 to 0—Transmit Wait Cancel Register: These bits control cancellation of
transmit wait messages in the corresponding HCAN mailboxes.
Bit x: TXCRx
0
1
Bit 8—Reserved: This bit always reads 0. The write value should always be 0.
542
Initial value:
Initial value:
TXCR
Transmit Wait Cancel Register (TXCR)
R/W:
R/W:
Bit:
Bit:
TXCR15 TXCR14 TXCR13 TXCR12 TXCR11 TXCR10 TXCR9
TXCR7
Description
Transmit message cancellation idle state in corresponding mailbox
[Clearing condition]
Completion of TXPR clearing (when transmit message is canceled normally)
TXPR cleared for corresponding mailbox (transmit message cancellation)
R/W
R/W
15
0
7
0
TXCR6
R/W
R/W
14
0
6
0
TXCR5
R/W
R/W
13
0
5
0
TXCR4
R/W
R/W
12
0
4
0
TXCR3
R/W
R/W
11
0
3
0
TXCR2
R/W
R/W
10
0
2
0
TXCR1
R/W
R/W
9
0
1
0
(Initial value)
(x = 15 to 0)
TXCR8
R/W
—
—
8
0
0
0