HD6432646 Hitachi, HD6432646 Datasheet - Page 653

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

17.2.4
Bit
Initial value
Read/Write
PWCNT is a 10-bit up-counter incremented by the input clock. The input clock is selected by
clock select bits 2 to 0 (CKS2 to CKS0) in PWCR.
PWCNT1 is used as the channel 1 time base, and PWCNT2 as the channel 2 time base.
PWCNT is initialized to H'FC00 when the counter start bit (CST) in PWCR is cleared to 0, and
also upon reset and in standby mode, watch mode, subactive mode, subsleep mode, and module
stop mode.
17.2.5
Bit
Initial value
Read/Write
PWCYR is a 16-bit read/write register that sets the PWM conversion cycle. When a PWCYR
compare match occurs, PWCNT is cleared and data is transferred from the buffer register
(PWBFR) to the duty register (PWDTR). PWCYR1 is used for the channel 1 conversion cycle
setting, and PWCYR2 for the channel 2 conversion cycle setting.
PWCYR should be written to only while PWCNT is stopped. A value of H'FC00 must not be set.
PWCYR is initialized to H'FFFF upon reset, and in standby mode, watch mode, subactive mode,
subsleep mode, and module stop mode.
Compare match
PWCNT
(lower 10 bits)
PWCYR
(lower 10 bits)
PWM Counters 1 and 2 (PWCNT1, PWCNT2)
PWM Cycle Registers 1 and 2 (PWCYR1, PWCYR2)
15
—
—
15
—
—
1
1
14
—
—
14
—
—
1
1
0
13
—
—
13
—
—
Figure 17-3 Cycle Register Compare Match
1
1
1
12
—
—
12
—
—
1
1
11
—
—
11
—
—
1
1
10
—
—
10
—
— R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
1
1
—
9
0
9
1
N
—
8
0
8
1
—
7
0
7
1
—
6
0
6
1
—
5
0
5
1
Compare match
N–2
—
4
0
4
1
—
3
0
3
1
N–1
—
2
0
2
1
0
—
1
0
1
1
619
—
1
0
0
0
1