HD6432646 Hitachi, HD6432646 Datasheet - Page 585

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

15.2.12 Mailbox Interrupt Mask Register (MBIMR)
The mailbox interrupt mask register (MBIMR) is a 16-bit readable/writable register containing
flags that enable or disable individual mailbox (buffer) interrupt requests.
Bits 15 to 0—Mailbox Interrupt Mask (MBIMRx): Flags that enable or disable individual
mailbox interrupt requests.
Bit x: MBIMRx
0
1
Initial value:
Initial value:
MBIMR
R/W:
R/W:
Bit:
Bit:
MBIMR15 MBIMR14 MBIMR13 MBIMR12 MBIMR11 MBIMR10 MBIMR9 MBIMR8
MBIMR7
Description
[Transmitting]
Interrupt request to CPU due to TXPR clearing
[Receiving]
Interrupt request to CPU due to RXPR setting
Interrupt requests to CPU disabled
R/W
R/W
15
1
7
1
MBIMR6 MBIMR5
R/W
R/W
14
1
6
1
R/W
R/W
13
1
5
1
MBIMR4 MBIMR3
R/W
R/W
12
1
4
1
R/W
R/W
11
1
3
1
MBIMR2
R/W
R/W
10
1
2
1
MBIMR1 MBIMR0
R/W
R/W
9
1
1
1
(Initial value)
(x = 15 to 0)
R/W
R/W
8
1
0
1
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