HD6432646 Hitachi, HD6432646 Datasheet - Page 21

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Section 5
5.1
5.2
5.3
5.4
5.5
5.6
Section 6
6.1
6.2
Overview............................................................................................................................ 101
5.1.1
5.1.2
5.1.3
5.1.4
Register Descriptions......................................................................................................... 104
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
Interrupt Sources................................................................................................................ 109
5.3.1
5.3.2
5.3.3
Interrupt Operation ............................................................................................................ 114
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
Usage Notes ....................................................................................................................... 123
5.5.1
5.5.2
5.5.3
5.5.4
5.5.5
DTC Activation by Interrupt ............................................................................................. 125
5.6.1
5.6.2
5.6.3
Overview............................................................................................................................ 129
6.1.1
6.1.2
6.1.3
Register Descriptions......................................................................................................... 131
6.2.1
6.2.2
Interrupt Controller ..........................................................................101
Features ................................................................................................................ 101
Block Diagram...................................................................................................... 102
Pin Configuration ................................................................................................. 103
Register Configuration ......................................................................................... 103
System Control Register (SYSCR) ...................................................................... 104
Interrupt Priority Registers A to H, J, K, M
(IPRA to IPRH, IPRJ, IPRK, IPRM) ................................................................... 105
IRQ Enable Register (IER) .................................................................................. 106
IRQ Sense Control Registers H and L (ISCRH, ISCRL)..................................... 107
IRQ Status Register (ISR) .................................................................................... 108
External Interrupts................................................................................................ 109
Internal Interrupts ................................................................................................. 110
Interrupt Exception Handling Vector Table ......................................................... 110
Interrupt Control Modes and Interrupt Operation ................................................ 114
Interrupt Control Mode 0...................................................................................... 117
Interrupt Control Mode 2...................................................................................... 119
Interrupt Exception Handling Sequence .............................................................. 121
Interrupt Response Times..................................................................................... 122
Contention between Interrupt Generation and Disabling..................................... 123
Instructions that Disable Interrupts ...................................................................... 124
Times when Interrupts are Disabled..................................................................... 124
Interrupts during Execution of EEPMOV Instruction.......................................... 125
IRQ Interrupts ...................................................................................................... 125
Overview .............................................................................................................. 125
Block Diagram...................................................................................................... 125
Operation .............................................................................................................. 126
PC Break Controller (PBC)..............................................................129
Features ................................................................................................................ 129
Block Diagram...................................................................................................... 130
Register Configuration ......................................................................................... 131
Break Address Register A (BARA) ..................................................................... 131
Break Address Register B (BARB)...................................................................... 132
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