HD6432646 Hitachi, HD6432646 Datasheet - Page 750

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

21.1.2
The clock pulse generator is controlled by SCKCR and LPWRCR. Table 21-1 shows the register
configuration.
Table 21-1 Clock Pulse Generator Register
Name
System clock control register
Low-power control register
Note:* Lower 16 bits of the address.
21.2
21.2.1
SCKCR is an 8-bit readable/writable register that performs ø clock output control and medium-
speed mode control, selection of operation when the PLL circuit frequency multiplication factor is
changed, and medium-speed mode control.
SCKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7—ø Clock Output Disable (PSTOP): Controls ø output.
Bit 7
PSTOP
0
1
Bits 6 to 4—Reserved: These bits are always read as 0 and cannot be modified.
716
Bit
Initial value
R/W
High Speed Mode,
Medium Speed Mode,
Sub-Active Mode
ø output (initial value)
Fixed high
Register Configuration
Register Descriptions
System Clock Control Register (SCKCR)
:
:
:
PSTOP
R/W
7
0
—
—
6
0
Sleep Mode,
Sub-Sleep Mode
ø output
Fixed high
Abbreviation
SCKCR
LPWRCR
—
—
5
0
Description
—
—
4
0
R/W
R/W
R/W
Software Standby
Mode, Watch Mode,
and Direct Transition
Fixed high
Fixed high
STCS
R/W
3
0
Initial Value
H'00
H'00
SCK2
R/W
2
0
SCK1
R/W
Hardware
Standby Mode
High impedance
High impedance
1
0
Address*
H'FDE6
H'FDEC
SCK0
R/W
0
0