HD6432646 Hitachi, HD6432646 Datasheet - Page 124
HD6432646
Manufacturer Part Number
HD6432646
Description
(HD64F264x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432646.pdf
(1155 pages)
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4.1.2
Exceptions originate from various sources. Trap instructions and interrupts are handled as follows:
1. The program counter (PC), condition code register (CCR), and extended register (EXR) are
2. The interrupt mask bits are updated. The T bit is cleared to 0.
3. A vector address corresponding to the exception source is generated, and program execution
For a reset exception, steps 2 and 3 above are carried out.
4.1.3
The exception sources are classified as shown in figure 4-1. Different vector addresses are
assigned to different exception sources.
Table 4-2 lists the exception sources and their vector addresses.
90
pushed onto the stack.
starts from that address.
Exception
sources
Exception Handling Operation
Exception Vector Table
Reset
Trace
Interrupts
Trap instruction
External interrupts: NMI, IRQ5 to IRQ0
Internal interrupts: Interrupts from on-chip supporting modules
Figure 4-1 Exception Sources
43 sources in the H8S/2646, H8S/2646R,
and H8S/2645
47 sources in the H8S/2648, H8S/2648R,
and H8S/2647
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