HD6432646 Hitachi, HD6432646 Datasheet - Page 1073

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Notes: *1 The ORER flag is not affected and retains its previous state when the RE bit in SCR is
*2 The receive data prior to the overrun error is retained in RDR, and the data received
*3 The FER flag is not affected and retains its previous state when the RE bit in SCR is
*4 In 2-stop-bit mode, only the first stop bit is checked for a value of 0; the second stop bit
*5 The PER flag is not affected and retains its previous state when the RE bit in SCR is
*6 If a parity error occurs, the receive data is transferred to RDR but the RDRF flag is not
*7 Retains its previous state when the RE bit in SCR is cleared to 0 with multiprocessor
*8 RDR and the RDRF flag are not affected and retain their previous values when an error
*9 Only 0 can be written, to clear the flag.
cleared to 0.
subsequently is lost. Also, subsequent serial reception cannot be continued while the
ORER flag is set to 1. In clocked synchronous mode, serial transmission cannot be
continued, either.
cleared to 0.
is not checked. If a framing error occurs, the receive data is transferred to RDR but the
RDRF flag is not set. Also, subsequent serial reception cannot be continued while the
FER flag is set to 1. In clocked synchronous mode, serial transmission cannot be
continued, either.
cleared to 0.
set. Also, subsequent serial reception cannot be continued while the PER flag is set to
1. In clocked synchronous mode, serial transmission cannot be continued, either.
format.
is detected during reception or when the RE bit in SCR is cleared to 0.
If reception of the next data is completed while the RDRF flag is still set to 1, an overrun
error will occur and the receive data will be lost.
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