HD6432646 Hitachi, HD6432646 Datasheet - Page 454

• Manufacturer Part Number: HD6432646
• Description: (HD64F264x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

WDT0 TCSR Bit 3—Reserved Bit: It is always read as 1 and cannot be modified.
WDT1 TCSR Bit 3—Reset or NMI (RST/NMI): This bit is used to choose between an internal
reset request and an NMI request when the TCNT overflows during the watchdog timer mode.
Bit 3
RTS/NMI
0
1
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select one of eight internal clock
sources, obtained by dividing the system clock (ø) or subclock (ø SUB), for input to TCNT.
WDT0 Input Clock Select
Bit 2
CKS2
0
1
Note: * An overflow period is the time interval between the start of counting up from H'00 on the
420
TCNT and the occurrence of a TCNT overflow.
Bit 1
CKS1
0
1
0
1
Description
NMI request.
Internal reset request.
Bit 0
CKS0
0
1
0
1
0
1
0
1
Description
Clock
ø/2 (initial value)
ø/64
ø/128
ø/512
ø/2048
ø/8192
ø/32768
ø/131072
Overflow Period* (where ø = 20 MHz)
25.6 µs
819.2 µs
1.6 ms
6.6 ms
26.2 ms
104.9 ms
419.4 ms
1.68 s
(Initial value)