AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 269

• Manufacturer Part Number: AT91SAM7S256D-AU
• Description: ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
• Manufacturer: Atmel
• Series: SAM7S256r

Specifications of AT91SAM7S256D-AU

• Rohs: yes
• Core: ARM
• Processor Series: AT91SAM
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 55 MHz
• Program Memory Size: 256 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3 V to 3.6 V
• Operating Temperature Range: - 40 C to + 85 C
• Package / Case: LQFP-64
• Mounting Style: SMD/SMT
• Interface Type: 2-Wire, I2S, SPI, USART
• Length: 7 mm

28. Serial Peripheral Interface (SPI)
28.1
28.2
Overview
The Serial Peripheral Interface (SPI) circuit is a synchronous serial data link that provides communication with
external devices in Master or Slave Mode. It also enables communication between processors if an external pro-
cessor is connected to the system.
The Serial Peripheral Interface is essentially a shift register that serially transmits data bits to other SPIs. During a
data transfer, one SPI system acts as the “master”' which controls the data flow, while the other devices act as
“slaves'' which have data shifted into and out by the master. Different CPUs can take turn being masters (Multiple
Master Protocol opposite to Single Master Protocol where one CPU is always the master while all of the others are
always slaves) and one master may simultaneously shift data into multiple slaves. However, only one slave may
drive its output to write data back to the master at any given time.
A slave device is selected when the master asserts its NSS signal. If multiple slave devices exist, the master gen-
erates a separate slave select signal for each slave (NPCS).
The SPI system consists of two data lines and two control lines:
Block Diagram
Figure 28-1. Block Diagram
• Master Out Slave In (MOSI): This data line supplies the output data from the master shifted into the input(s) of
• Master In Slave Out (MISO): This data line supplies the output data from a slave to the input of the master.
• Serial Clock (SPCK): This control line is driven by the master and regulates the flow of the data bits. The master
• Slave Select (NSS): This control line allows slaves to be turned on and off by hardware.
the slave(s).
There may be no more than one slave transmitting data during any particular transfer.
may transmit data at a variety of baud rates; the SPCK line cycles once for each bit that is transmitted.
APB
PMC
MCK
Interrupt Control
SPI Interface
SPI Interrupt
PDC
PIO
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
SPCK
MISO
MOSI
NPCS0/NSS
NPCS1
NPCS2
NPCS3
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