AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 621

no-image

AT91SAM7S256D-AU

Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet

Specifications of AT91SAM7S256D-AU

Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S256D-AU
Manufacturer:
ATMEL
Quantity:
101
Part Number:
AT91SAM7S256D-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91SAM7S256D-AU-999
Manufacturer:
Atmel
Quantity:
10 000
40.6.11
40.6.11.1
40.6.11.2
40.6.11.3
40.6.11.4
The data need to be delayed for one bit clock period with an external assembly. In the following schematic, TD, TK
and NRST are SAM7S signals, TXD is the delayed data to connect to the device.
The value of CLDIV x 2
equal to 8191
None.
When a software reset is performed during a frame and when TWCK is low, it is impossible to initiate a new trans-
fer in READ or WRITE mode.
None.
Any transfer in progress is immediately frozen if the Control Register (TWI_CR) is written with the bit MSDIS at 1.
Furthermore, the status bits TXCOMP and TXRDY in the Status Register (TWI_SR) are not reset.
The user must wait for the end of transfer before disabling the TWI. In addition, the interrupts must be disabled
before disabling the TWI.
During a master frame, if TWI_SR is read between the Non Acknowledge condition detection and the TXCOMP bit
rising in the TWI_SR, the NACK bit is not set.
The user must wait for the TXCOMP status bit by interrupt and must not read the TWI_SR as long as transmission
is not completed.
Two-wire Interface (TWI)
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
TWI: Clock Divider
TWI: Software Reset
TWI: Disabling Does not Operate Correctly
TWI: NACK Status Bit Lost
CKDIV
must be less than or equal to 8191, the value of CHDIV x 2
SAM7S Series [DATASHEET]
CKDIV
6175M–ATARM–26-Oct-12
must be less than or
621

Related parts for AT91SAM7S256D-AU