AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 753

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AT91SAM7S256D-AU

Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet

Specifications of AT91SAM7S256D-AU

Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm

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Revision History
Version
6175L
Version
6175L
In the tables that follow, the most recent revision appears first.
Comments
Section 39. ”SAM7S Ordering Information”
MLR rev. D. in
Section 9.5 ”Debug
SAM7S256 Rev D.
Table 12-2, “SAM7S Series Debug Unit Chip ID”
Errata:
40-1 “Errata Summary
Section 40.15 ”SAM7S128 Errata - Revision D
Section 40.10 ”SAM7S256 Errata - Revision D
PWM:
Section 34.4.2 ”Power
clock to be enabled.”
WDT:
Section 16.4.2 ”Watchdog Timer Mode Register”
modified within a period of time of 3 slow clock periods following a restart of the watchdog performed by
means of a write access in the WDT_CR register, else the watchdog may trigger an end of period earlier than
expected.”
Section 16.3 ”Functional
WDT_CR register, the WDT_MR register must not be programmed during a period of time of 3 slow clock
period following the WDT_CR write access. In any case, programming a new value in WDT_MR automatically
initiates a restart instruction.”
Comments
Product Series Naming Convention
Except for part ordering and library references, AT91 prefix dropped from most nomenclature.
AT91SAM7S becomes SAM7S.
Debug Unit:
“Chip ID Registers” on page
Debug and Test Features:
Table 12-2, “SAM7S Series Debug Unit Chip
Errata:
Section 40.5 ”SAM7S512 Errata - Revision B
02x270B0A4F.
40-1 “Errata Summary
Table 39-1, “SAM7S Series Ordering Information”
Unit”,
Management”, removed sentence, “Configuring the PWM does not require the PWM
Table”: Added SAM7S128D/SAM7S256D Column
Table”, affixed missing S in three SAM7S256/128 column headers.
Description”, after third paragraph; added, “If the watchdog is restarted by writing into
“Chip ID Registers” on page
31, CHIP ID is 0x270B0A4F for AT91SAM7S512 Rev B
updated product Ordering Code for SAM7S128 and SAM7S256
ID”, added AT91SAM7S512 Rev B, Chip ID: 02x270B0A4F.
Parts”, Updated AT91SAM7S512 Rev B, Chip ID is
Parts”: Added to Errata.
Parts”: Added to Errata.
Added SAM7S128 Rev D and SAM7S256 Rev D;
added, “Note:The WDD and WDV values must not be
31, added CHIP ID for SAM7S128 Rev D and
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
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