AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 297
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AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
Available stocks
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Price
Company:
Part Number:
AT91SAM7S256D-AU
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ATMEL
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29.5.2
29.5.3
29.6
29.6.1
29.6.2
Functional Description
Power Management
Interrupt
Transfer format
Modes of Operation
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer
must perform the following steps:
The TWI interface may be clocked through the Power Management Controller (PMC), thus the
programmer must first configure the PMC to enable the TWI clock.
The TWI interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). In
order to handle interrupts, the AIC must be programmed before configuring the TWI.
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must
be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
29-4 on page
Each transfer begins with a START condition and terminates with a STOP condition (see
29-3 on page
Figure 29-3.
Figure 29-4. Transfer Format
The TWI has two modes of operation:
• Program the PIO controller to:
• Enable the peripheral clock.
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
– Dedicate TWD and TWCK as peripheral lines.
– Define TWD and TWCK as open-drain.
TWCK
TWD
297).
297).
START and STOP Conditions
Start Address R/W
TWCK
TWD
Start
Ack
Data
Ack
SAM7S Series [DATASHEET]
Data
Stop
6175M–ATARM–26-Oct-12
Ack
Stop
Figure
Figure
297
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