AT91SAM7S256D-AU Atmel, AT91SAM7S256D-AU Datasheet - Page 52
AT91SAM7S256D-AU
Manufacturer Part Number
AT91SAM7S256D-AU
Description
ARM Microcontrollers - MCU 256K Flash SRAM 64K ARM based MCU
Manufacturer
Atmel
Series
SAM7S256r
Datasheet
1.AT91SAM7S256D-AU.pdf
(775 pages)
Specifications of AT91SAM7S256D-AU
Rohs
yes
Core
ARM
Processor Series
AT91SAM
Data Bus Width
16 bit/32 bit
Maximum Clock Frequency
55 MHz
Program Memory Size
256 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
3 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
Interface Type
2-Wire, I2S, SPI, USART
Length
7 mm
Available stocks
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Part Number:
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101
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12.5.4
12.5.4.1
Table 12-2.
For further details on the Debug Unit, see the Debug Unit section.
IEEE 1149.1 JTAG Boundary Scan allows pin-level access independent of the device packaging technology.
IEEE 1149.1 JTAG Boundary Scan is enabled when JTAGSEL is high. The SAMPLE, EXTEST and BYPASS func-
tions are implemented. In ICE debug mode, the ARM processor responds with a non-JTAG chip ID that identifies
the processor to the ICE system. This is not IEEE 1149.1 JTAG-compliant.
It is not possible to switch directly between JTAG and ICE operations. A chip reset must be performed after JTAG-
SEL is changed.
A Boundary-scan Descriptor Language (BSDL) file is provided to set up testing.
The Boundary-scan Register (BSR) contains 96 bits that correspond to active pins and associated control signals.
Each SAM7Sxx input/output pin corresponds to a 3-bit register in the BSR. The OUTPUT bit contains data that
can be forced on the pad. The INPUT bit facilitates the observability of data applied to the pad. The CONTROL bit
selects the direction of the pad.
Table 12-3.
AT91SAM7S128 Rev B
AT91SAM7S128 Rev C
AT91SAM7S128 Rev D
AT91SAM7S256 Rev A
AT91SAM7S256 Rev B
AT91SAM7S256 Rev C
AT91SAM7S256 Rev D
AT91SAM7S512 Rev A
AT91SAM7S512 Rev B
IEEE 1149.1 JTAG Boundary Scan
Bit Number
JTAG Boundary-scan Register
96
95
94
93
92
91
90
89
88
SAM7S Series Debug Unit Chip ID (Continued)
SAM7Sxx JTAG Boundary Scan Register
PA17/PGMD5/AD0
PA18/PGMD6/AD1
PA21/PGMD9*
Pin Name
Pin Type
IN/OUT*
IN/OUT
IN/OUT
0x270B0A40
0x270B0A4F
0x270A0741
0x270A0742
0x270A0743
0x270D0940
0x270B0941
0x270B0942
0x270B0943
SAM7S Series [DATASHEET]
Associated BSR
CONTROL
CONTROL
CONTROL
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
Cells
(1)
(1)
(1)
6175M–ATARM–26-Oct-12
52
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