MA180025 Microchip Technology, MA180025 Datasheet - Page 152

• Manufacturer Part Number: MA180025
• Description: MODULE PLUG-IN PIC18F87J90 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180025

• Accessory Type: Plug-In Module (PIM) - PIC18F87J90
• Product: Microcontroller Modules
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PICDEM LCD 2 Demonstration Board (DM163030)
• For Use With: DM163030 - KIT DEV PICDEM LCD2
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J90 FAMILY
14.1
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
FIGURE 14-1:
FIGURE 14-2:
DS39933D-page 152
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
T1OSO/T13CKI
T13CKI/T1OSO
Timer3 Operation
T1OSI
T1OSI
CCPx Select from T3CON<6,3>
CCPx Select from T3CON<6,3>
Timer1 Oscillator
Timer1 Oscillator
CCPx Special Event Trigger
T1OSCEN
T3CKPS<1:0>
T3SYNC
TMR3ON
TIMER3 BLOCK DIAGRAM (8-BIT MODE)
T1OSCEN
T3CKPS<1:0>
T3SYNC
TMR3ON
CCPx Special Event Trigger
TIMER3 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
(1)
(1)
TMR3CS
TMR3CS
Clock
Internal
F
Internal
Clock
F
OSC
OSC
/4
/4
1
0
1
0
Timer1 Clock Input
Timer1 Clock Input
Clear TMR3
Clear TMR3
Prescaler
Prescaler
1, 2, 4, 8
1, 2, 4, 8
The operating mode is determined by the clock select
bit, TMR3CS (T3CON<1>). When TMR3CS is cleared
(= 0), Timer3 increments on every internal instruction
cycle (F
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
As
RC0/T1OSO/T13CKI pins become inputs when the
Timer1 oscillator is enabled. This means the values of
TRISC<1:0> are ignored and the pins are read as ‘0’.
2
2
with
OSC
TMR3L
TMR3L
/4). When the bit is set, Timer3 increments
8
Timer1,
8
Synchronize
Synchronize
Sleep Input
Sleep Input
Detect
Detect
High Byte
High Byte
TMR3H
TMR3
TMR3
8
 2010 Microchip Technology Inc.
8
the
8
Internal Data Bus
1
0
1
0
Read TMR1L
Write TMR1L
RC1/T1OSI
Set
TMR3IF
on Overflow
Set
TMR3IF
on Overflow
Timer3
On/Off
Timer3
On/Off
and