MA180025 Microchip Technology, MA180025 Datasheet - Page 268

• Manufacturer Part Number: MA180025
• Description: MODULE PLUG-IN PIC18F87J90 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180025

• Accessory Type: Plug-In Module (PIM) - PIC18F87J90
• Product: Microcontroller Modules
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PICDEM LCD 2 Demonstration Board (DM163030)
• For Use With: DM163030 - KIT DEV PICDEM LCD2
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J90 FAMILY
19.3.4
During Sleep mode, all clocks to the EUSART are
suspended. Because of this, the Baud Rate Generator
is inactive and a proper byte reception cannot be per-
formed. The auto-wake-up feature allows the controller
to wake-up, due to activity on the RX1/DT1 line, while
the EUSART is operating in Asynchronous mode.
The auto-wake-up feature is enabled by setting the
WUE bit (BAUDCON<1>). Once set, the typical receive
sequence on RX1/DT1 is disabled and the EUSART
remains in an Idle state, monitoring for a wake-up event
independent of the CPU mode. A wake-up event
consists of a high-to-low transition on the RX1/DT1
line. (This coincides with the start of a Sync Break or a
Wake-up Signal character for the LIN/J2602 protocol.)
Following a wake-up event, the module generates an
RC1IF interrupt. The interrupt is generated synchro-
nously to the Q clocks in normal operating modes
(Figure 19-8), and asynchronously, if the device is in
Sleep mode (Figure 19-9). The interrupt condition is
cleared by reading the RCREG1 register.
The WUE bit is automatically cleared once a low-to-high
transition is observed on the RX1 line following the
wake-up event. At this point, the EUSART module is in
Idle mode and returns to normal operation. This signals
to the user that the Sync Break event is over.
19.3.4.1
Since auto-wake-up functions by sensing rising edge
transitions on RX1/DT1, information with any state
changes before the Stop bit may signal a false
FIGURE 19-8:
FIGURE 19-9:
DS39933D-page 268
Note 1:
Note 1:
RX1/DT1 Line
RX1/DT1 Line
WUE bit
WUE bit
2:
RC1IF
RC1IF
OSC1
OSC1
If the wake-up event requires long oscillator warm-up time, the auto-clear of the WUE bit can occur while the stposc signal is still active.
The EUSART remains in Idle while the WUE bit is set.
This sequence should not depend on the presence of Q clocks.
The EUSART remains in Idle while the WUE bit is set.
(1)
(2)
AUTO-WAKE-UP ON SYNC BREAK
CHARACTER
Special Considerations Using
Auto-Wake-up
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Bit set by user
Bit set by user
SLEEP Command Executed
AUTO-WAKE-UP BIT (WUE) TIMINGS DURING NORMAL OPERATION
AUTO-WAKE-UP BIT (WUE) TIMINGS DURING SLEEP
Q1
Sleep Ends
End-Of-Character (EOF) and cause data or framing
errors. Therefore, to work properly, the initial character
in the transmission must be all ‘0’s. This can be 00h
(8 bytes) for standard RS-232 devices or 000h (12 bits)
for LIN/J2602 bus.
Oscillator start-up time must also be considered,
especially in applications using oscillators with longer
start-up intervals (i.e., XT or HS mode). The Sync
Break (or Wake-up Signal) character must be of
sufficient length and be followed by a sufficient interval
to allow enough time for the selected oscillator to start
and provide proper initialization of the EUSART.
19.3.4.2
The timing of WUE and RC1IF events may cause some
confusion when it comes to determining the validity of
received data. As noted, setting the WUE bit places the
EUSART in an Idle mode. The wake-up event causes
a receive interrupt by setting the RC1IF bit. The WUE
bit is cleared after this when a rising edge is seen on
RX1/DT1. The interrupt condition is then cleared by
reading the RCREG1 register. Ordinarily, the data in
RCREG1 will be dummy data and should be discarded.
The fact that the WUE bit has been cleared (or is still
set), and the RC1IF flag is set, should not be used as
an indicator of the integrity of the data in RCREG1.
Users should consider implementing a parallel method
in firmware to verify received data integrity.
To assure that no actual data is lost, check the RCIDL
bit to verify that a receive operation is not in process. If
a receive operation is not occurring, the WUE bit may
then be set just prior to entering the Sleep mode.
Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Cleared due to user read of RCREG1
Cleared due to user read of RCREG1
Special Considerations Using
the WUE Bit
 2010 Microchip Technology Inc.
Note 1
Auto-Cleared
Auto-Cleared