MA180025 Microchip Technology, MA180025 Datasheet - Page 296

• Manufacturer Part Number: MA180025
• Description: MODULE PLUG-IN PIC18F87J90 PIM
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of MA180025

• Accessory Type: Plug-In Module (PIM) - PIC18F87J90
• Product: Microcontroller Modules
• Silicon Manufacturer: Microchip
• Core Architecture: PIC
• Core Sub-architecture: PIC18
• Silicon Core Number: PIC18F
• Silicon Family Name: PIC18FxxJxx
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: PICDEM LCD 2 Demonstration Board (DM163030)
• For Use With: DM163030 - KIT DEV PICDEM LCD2
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J90 FAMILY
21.5
Figure 21-3 shows the operation of the A/D Converter
after the GO/DONE bit has been set and the
ACQT<2:0> bits are cleared. A conversion is started
after the following instruction to allow entry into Sleep
mode before the conversion begins.
Figure 21-4 shows the operation of the A/D Converter
after the GO/DONE bit has been set, the ACQT<2:0>
bits are set to ‘010’ and selecting a 4 T
time before the conversion starts.
Clearing the GO/DONE bit during a conversion will
abort the current conversion. The A/D Result register
pair will NOT be updated with the partially completed
A/D
ADRESH:ADRESL registers will continue to contain
the value of the last completed conversion (or the last
value written to the ADRESH:ADRESL registers).
After the A/D conversion is completed or aborted, a
2 T
started. After this wait, acquisition on the selected
channel is automatically started.
FIGURE 21-3:
FIGURE 21-4:
DS39933D-page 296
Note:
(Holding capacitor continues
acquiring input)
AD
Set GO/DONE bit
wait is required before the next acquisition can be
1
T
conversion
CY
Set GO/DONE bit
Holding capacitor is disconnected from analog input (typically 100 ns)
A/D Conversions
T
- T
Automatic
Acquisition
Time
ACQT
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
2
AD
Conversion starts
T
Cycles
AD
3
1 T
sample.
A/D CONVERSION T
A/D CONVERSION T
AD
b9
4
2 T
Conversion starts
(Holding capacitor is disconnected)
AD
b8
1
This
3 T
AD
b7
b9
Next Q4: ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
2
4 T
AD
means
Next Q4: ADRESH:ADRESL is loaded, GO/DONE bit is cleared,
acquisition
AD
b6
b8
3
AD
5 T
AD
ADIF bit is set, holding capacitor is connected to analog input.
CYCLES (ACQT<2:0> = 000, T
CYCLES (ACQT<2:0> = 010, T
AD
ADIF bit is set, holding capacitor is reconnected to analog input.
the
b5
b7
4
6 T
AD
b4
T
5
b6
7 T
AD
Cycles
21.6
An A/D conversion can be started by the “Special Event
Trigger” of the CCP2 module. This requires that the
CCP2M<3:0> bits (CCP2CON<3:0>) be programmed
as ‘1011’ and that the A/D module is enabled (ADON
bit is set). When the trigger occurs, the GO/DONE bit
will be set, starting the A/D acquisition and conversion,
and the Timer1 (or Timer3) counter will be reset to zero.
Timer1 (or Timer3) is reset to automatically repeat the
A/D acquisition period with minimal software overhead
(moving ADRESH:ADRESL to the desired location).
The appropriate analog input channel must be selected
and the minimum acquisition period is either timed by
the user, or an appropriate T
the Special Event Trigger sets the GO/DONE bit (starts
a conversion).
If the A/D module is not enabled (ADON is cleared), the
Special Event Trigger will be ignored by the A/D module
but will still reset the Timer1 (or Timer3) counter.
AD
b3
b5
6
8
T
AD
b2
Use of the CCP2 Trigger
b4
7
9 T
AD
b1
b3
10
8
T
AD
b0
ACQ
ACQ
b2
11
9
 2010 Microchip Technology Inc.
= 0)
= 4 T
ACQ
10
b1
time is selected before
AD
b0
)
11