MA180025 Microchip Technology, MA180025 Datasheet - Page 331

MODULE PLUG-IN PIC18F87J90 PIM

MA180025

Manufacturer Part Number
MA180025
Description
MODULE PLUG-IN PIC18F87J90 PIM
Manufacturer
Microchip Technology
Series
PIC®r
Datasheets

Specifications of MA180025

Accessory Type
Plug-In Module (PIM) - PIC18F87J90
Product
Microcontroller Modules
Silicon Manufacturer
Microchip
Core Architecture
PIC
Core Sub-architecture
PIC18
Silicon Core Number
PIC18F
Silicon Family Name
PIC18FxxJxx
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
PICDEM LCD 2 Demonstration Board (DM163030)
For Use With
DM163030 - KIT DEV PICDEM LCD2
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MA180025
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
MA180025
Manufacturer:
MICROCHIP
Quantity:
12 000
25.2
For PIC18F87J90 family devices, the WDT is driven by
the INTRC oscillator. When the WDT is enabled, the
clock source is also enabled. The nominal WDT period is
4 ms and has the same stability as the INTRC oscillator.
The 4 ms period of the WDT is multiplied by a 16-bit
postscaler. Any output of the WDT postscaler is
selected by a multiplexor, controlled by the WDTPS bits
in Configuration Register 2H. Available periods range
from 4 ms to 131.072 seconds (2.18 minutes). The
WDT and postscaler are cleared whenever a SLEEP or
CLRWDT instruction is executed, or a clock failure
(primary or Timer1 oscillator) has occurred.
FIGURE 25-1:
 2010 Microchip Technology Inc.
All Device Resets
INTRC Oscillator
WDTPS<3:0>
Watchdog Timer (WDT)
SWDTEN
CLRWDT
Sleep
WDT BLOCK DIAGRAM
Enable WDT
WDT Counter
128
INTRC Control
4
Programmable Postscaler
1:1 to 1:32,768
PIC18F87J90 FAMILY
25.2.1
The WDTCON register (Register 25-9) is a readable
and writable register. The SWDTEN bit enables or dis-
ables WDT operation. This allows software to override
the WDTEN Configuration bit and enable the WDT only
if it has been disabled by the Configuration bit.
Note 1: The CLRWDT and SLEEP instructions
2: When a CLRWDT instruction is executed,
WDT
CONTROL REGISTER
clear the WDT and postscaler counts
when executed.
the postscaler count will be cleared.
Reset
DS39933D-page 331
Wake-up from
Power-Managed
Modes
WDT
Reset

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