AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 228

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

22.3
Figure 22-3. SPI in Slave Mode
22.4
22.5
228
Slave Mode
PIO Controller
Power Management
AT91SAM7A1
NPCS0 /NSS
SPCK
MISO
MOSI
SPIDIS
CPOL
SPI _CSR0 [7:0]
In Slave Mode, the SPI waits for NSS to go active low before receiving the serial clock from an
external master. In Slave Mode, CPOL, NCPHA and BITS fields of SPI_CSR0 are used to
define the transfer characteristics. The other fields in SPI_CSR0 and the other Chip Select
Registers are not used in Slave Mode.
The SPI has 7 programmable I/O lines. These I/O lines are multiplexed with signals (MISO,
MOSI, SPCK, NPCS[3:0]) of the SPI to optimize the use of available package pins. These
lines are controlled by the SPI PIO controller.
The SPI is provided with a power management block allowing optimization of power consump-
tion (see
LSB
SPIEN
SPI _RDR (RD)
SPI _TDR (TD)
CPHA
Serializer
”Power Management Block” on page
S
R
Q
MSB
SPI _SR
OVRE
RDRF
TDRE
SPIENS
23).
SPI _IMR
SPI _IDR
SPI _IER
6048B–ATARM–29-Jun-06
SPI _INT