AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 284

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

25.8.2
25.9
284
Fault Confinement
AT91SAM7A1
Error Signalling
A node detecting an error condition signals this by transmitting an error flag. For an error
active node, it is an active error flag; for an error passive node, it is a passive error flag.
Whenever a bit error, a stuff error, a form error or an acknowledgement error is detected by
any node, transmission of an error flag is started at the respective node at the next bit.
Whenever a CRC error is detected, transmission of an error flag starts at the bit following the
ACK delimiter, unless an error flag for another error condition has already been started.
Regarding fault confinement, a unit may be in one of three states:
An error active unit can normally take part in bus communication and sends an active error
flag when an error has been detected.
An error passive unit must not send an active error flag. It takes part in bus communication,
but when an error has been detected, only a passive error flag is sent. After a transmission, an
error passive unit will wait before initiating a further transmission (see
on page
A bus off unit is not allowed to have any influence on the bus. (e.g., output drivers switched
off).
For fault confinement, two counts are implemented in every bus unit:
These counts are modified according to the following rules (note that more than one rule may
apply during a given message transfer):
• Stuff error (STUFF bit in CAN_SRX): A stuff error is detected at the bit time of the 6th
• CRC error (CRC bit in CAN_SRX): The CRC sequence consists of the result of the CRC
• Form error (FRAME bit in CAN_SRX): A form error has to be detected when a fixed-form
• Acknowledgement error (ACK bit in CAN_SRX): An acknowledgement error is detected by
• error active
• error passive
• bus off
• transmit error count
• receive error count
• When a receiver detects an error, the receive error count will be increased by 1, except
a dominant bit is monitored. A transmitter sending a passive error flag and detecting a
dominant bit does not interpret this as a bit error.
consecutive equal bit level in a message field that should be coded by the method of bit
stuffing.
calculation by the transmitter. The receivers calculate the CRC in the same way as the
transmitter. A CRC error has to be detected if the calculated result is not the same as that
received in the CRC sequence.
bit field contains one or more illegal bits. (Note that for a receiver a dominant bit during the
last bit of EOF is not treated as a form error).
a transmitter whenever it does not monitor a dominant bit during ACK slot.
when the detected error was a bit error during the sending of an active error flag or an
overload flag.
282).
”Suspend Transmission”
6048B–ATARM–29-Jun-06