AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 35

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

10.4.3.2
6048B–ATARM–29-Jun-06
Data Float Wait State
Figure 10-12. Read Cycle with Two Wait States
The write cycle is delayed one cycle for each wait state programmed. NWE (or NWR0, NWR1)
goes high one half cycle before the end of the write cycle.
Figure 10-13. Write Cycle with One Wait State
Figure 10-14. Write Cycle with Two Wait States
Data float wait states are added to avoid data bus conflict.
After a read access, data float wait states allow more time for the external memory to release
the data bus.
After a write access, data float wait states allow more time for the EBI to release the data bus.
The Data Float Output time (t
field of the AMC_CSRx register for the corresponding chip select. The value (0 - 7 clock
cycles) indicates the number of data float wait states to be inserted.
Data float wait states are asserted between accesses.
• Wait state with write cycle
NOE/NRD
NOE/NRD
Address
Address
NCS
NCS
Address
NWE
NCS
DF
) for each external memory device is programmed in the TDF
Address Valid
Address Valid
Address Valid
AT91SAM7A1
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