AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 283

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

25.5
25.6
25.7
25.8
25.8.1
6048B–ATARM–29-Jun-06
Message Filtering
Message Validation
Coding
Error Handling
Error Detection
Message filtering is based upon the whole identifier. Mask registers that allow any identifier bit
to be set “don't care” for message filtering may be used to select groups of identifiers to be
mapped into the attached received buffers.
If mask registers are implemented, every bit of the mask registers must be programmable, i.e.,
they can be enabled or disabled for message filtering. The length of the mask register can
comprise the whole identifier or only part of it.
The point in time at which a message is taken to be valid is different for the transmitter and the
receiver of the message.
The message is valid for the transmitter if there is no error until the end of end of frame. If a
message is corrupted, retransmission will follow automatically and according to prioritization.
In order to be able to compete for bus access with other messages, retransmission has to start
as soon as the bus is idle.
The message is valid for the receivers if there is no error until the first-to-last bit of end of
frame. The value of the last bit of EOF is treated as “don't care”, a dominant value does not
lead to a FORM error (see
In bit stream coding, the frame segments start of frame, arbitration field, control field, data field
and CRC sequence are coded by bit stuffing. Whenever a transmitter detects five consecutive
bits of identical value in the bit stream to be transmitted, it automatically inserts a complemen-
tary bit in the currently transmitted bit stream.
The remaining bit fields of the data frame or remote frame (CRC delimiter, ACK field and end
of frame) are of fixed form and not stuffed. The error frame and the overload frame are of fixed
form as well and not coded via bit stuffing.
The bit stream in a message is coded according to the Non-Return-to-Zero (NRZ) method.
This means that during the total bit time the generated bit level is either dominant or recessive.
There are 5 different error types (not mutually exclusive):
• Every new controller supports the standard format.
• Every new controller can receive messages of the extended format. This requires that
• Transmitter
• Receivers
• Bit error (BUS bit in CAN_SRX): A unit that is sending a bit on the bus also monitors the
extended frames are not destroyed just because of their format. However, it is not required
that the extended format must be supported by new controllers.
bus. A bit error has to be detected when the bit value that is monitored is different from the
bit value that is sent. An exception is the sending of a recessive bit during the stuffed bit
stream of the arbitration field or during the ACK slot. In this case, no bit error occurs when
”Error Detection” on page
283).
AT91SAM7A1
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