AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 68
AT91SAM7A1-AU
Manufacturer Part Number
AT91SAM7A1-AU
Description
IC ARM7 MCU 32BIT ROMLESS144LQFP
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7A1-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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11.1.6
Name:
Access:
Address:
• OSTB[9:0]: Oscillator Stabilization Time
Number of clock cycles needed before master oscillator stabilization. This register must be configured by the software after
a hardware reset and before using the master oscillator.
The required time for master oscillator stabilization is 4 ms maximum and is based on the MCK/256 clock.
The default value is 0x000000B0 guaranteeing 176 x 256 MCK clock cycles (i.e., 11.264 ms with MCK = 4.0 MHz)
• OSTKEY[15:0]: Key for Write Access into the CM_OST Register
Any write in the OSTB[9:0] bits will only be effective if the OSTKEY[15:0] bits are equal to 0xDB5A. These bits are always
read at 0.
68
31
23
15
–
7
AT91SAM7A1
CM Oscillator Stabilization Timer Register
CM_OST
Read/Write
0xFFFEC014
30
22
14
–
6
29
21
13
–
5
28
20
12
–
4
OSTKEY[15:8]
OSTKEY[7:0]
OSTB[7:0]
27
19
11
–
3
26
18
10
–
2
25
17
9
1
OSTB[9:8]
6048B–ATARM–29-Jun-06
24
16
8
0
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