AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 372

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

26.14 Timer Test Controller Block
26.14.1
Name:
Access:
Offset:
• LDCT0: Load Timer 0 Counter
This bit generates a load counter with the value 0xFFFE.
• LDCT1: Load Timer 1 Counter
This bit generates a load counter with the value 0xFFFE.
• LDCT2: Load Timer 2 Counter
This bit generates a load counter with the value 0xFFFE.
372
31
23
15
–
–
–
7
–
AT91SAM7A1
GPT Test Control Register in Test Mode
GPT_TSTC
Write-only
0x40
30
22
14
–
–
–
6
–
The test mode is used to increase the fault coverage of the timer. This mode is entered by set-
ting SFM registers (see
entered, two registers are available, GPT_TSTC and GPT_TSTM.
The register GPT_TSTC is used to load the counter of each timer with the value 0xFFF0.
The register GPT_TSTM outputs the counter clock enable on the TIOB output for each chan-
nel. For this, it is necessary to put the timer in dual waveform mode and set the bit
corresponding to the channel in the GPT_TSTM (for example, 0x00000004 for the channel 2).
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
”Special Function Mode (SFM)” on page
27
19
11
–
–
–
3
–
LDCT2
26
18
10
–
–
–
2
70). When the test mode is
LDCT1
25
17
–
–
9
–
1
6048B–ATARM–29-Jun-06
LDCT0
24
16
–
–
8
–
0