AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 352

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AT91SAM7A1-AU

Manufacturer Part Number
AT91SAM7A1-AU
Description
IC ARM7 MCU 32BIT ROMLESS144LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7A1-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7A1-AU
Manufacturer:
Atmel
Quantity:
10 000
26.12.1.3
26.12.1.4
352
AT91SAM7A1
Pulse Generation
Trigger on TIOB Input Pin
This application generates only one pulse on TIOAx and on TIOBx between two triggers. The
pulses start with a trigger. The duration is given by the value of RA for TIOAx pulse and the
value of RB for TIOBx pulse. After each new trigger, another pulse is generated. When a trig-
ger occurs, the counter is reset at the next valid counter clock edge when the counter clock is
enabled.
If we want to start the pulse exactly when the counter is reset, RC must equal 0. Thus, it is the
comparison with RC = 0 that starts the pulse, and not the trigger.
In this case, the user must disable the counter clock when a compare RB is detected to stop
the counter.
To accept a new trigger, the user must then re-enable the counter clock.
Figure 26-12. Pulse Generation
In each of the previous examples, TIOBx is used as an output. It is possible to use it as a trig-
ger input and generate only TIOAx output signal.
The following application is the same as
page
351, where TIOBx is not used as an output but as an input.
(output)
(output)
RC = 0
Trigger
TIOA
TIOB
RB
RA
Counter
”Dual Pulse Width Modulation (PWM) Generation” on
Counter
Disable
Counter
Enable
6048B–ATARM–29-Jun-06

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