AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 315

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

26. General-purpose Timer (GPT)
26.1
Figure 26-1. General-purpose Timer - Three-channel Block Diagram
6048B–ATARM–29-Jun-06
CORECLK/1024
CORECLK/128
CORECLK/32
CORECLK/2
CORECLK/8
Description
GPT0TCLK0/MPIO
GPT0TCLK1/MPIO
GPT0TCLK2/MPIO
GPT0TCLK0/MPIO
GPT0TCLK1/MPIO
GPT0TCLK2/MPIO
GPT0TCLK0/MPIO
GPT0TCLK1/MPIO
GPT0TCLK2/MPIO
General-purpose Timer Block
TIOA1/MPIO
TIOA2/MPIO
TIOA0/MPIO
TIOA2/MPIO
TIOA0/MPIO
TIOA1/MPIO
The AT91SAM7A1 has three independent general-purpose timer blocks. They are grouped in
the same block and can be cascaded. Each timer has a 16-bit Timer/counter channel, a Power
Management Controller and a Parallel I/O Controller. Each channel can be independently pro-
grammed using the two operating modes (capture mode or waveform mode) to perform a
range of functions including frequency measurement, event counting, interval measurement,
pulse generation, delay timing, pulse width modulation and interrupt generation.
Each General Purpose Timer may operate in a different mode (capture mode or waveform
mode). Their counters are fully independent and each channel is associated with its own par-
allel I/O block and Power Management Controller.
• After a hardware reset, the timer pins are set as general purpose I/O (configured as input),
• Parallel I/O has priority over any Timer I/O configuration.
the interrupts are disabled in the interrupt controller and the Timer Controller Clock and the
PIO Controller Clock are disabled.
GPTCx_BMR[5:4]
GPTCx_BMR[3:2]
GPTCx_BMR[1:0]
XC0
XC1
XC2
XC0
XC1
XC2
XC0
XC1
XC2
Timer/Counter
Timer/Counter
Timer/Counter
Channel 0
Channel 1
Channel 2
GPTC_SYNC
GPTC_SYNC
GPTC_SYNC
TIOA
TIOB
TIOA
TIOB
TIOA
TIOB
INT
INT
INT
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
Controller
Interrupt
Generic
Parallel I/O
Controller
AT91SAM7A1
T0TCLK1/MPIO
T0TCLK2/MPIO
T0TCLK0/MPIO
TIOA0/MPIO
TIOB0/MPIO
TIOA1/MPIO
TIOB1/MPIO
TIOA2/MPIO
TIOB2/MPIO
315