AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 360

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AT91SAM7A1-AU

Manufacturer Part Number
AT91SAM7A1-AU
Description
IC ARM7 MCU 32BIT ROMLESS144LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7A1-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7A1-AU
Manufacturer:
Atmel
Quantity:
10 000
• BCPB: TIOB Compare B
These two bits determine the effect on the TIOBx output pin caused by an equal comparison between the counter and the
Compare Register B value. These bits are active only if TIOBx is not an input (see “EEVT[1:0]: External Event” of the
Mode Register in Waveform Mode” on page
where xxx = CPB.
Note:
• BCPC: TIOB Compare C
These two bits determine the effect on the TIOBx output pin caused by an equal comparison between the counter and the
Compare register C value. These bits are active only if TIOBx is not an input (see “EEVT[1:0]: External Event” of the
Mode Register in Waveform Mode” on page
where xxx = CPC.
• BEEVT: TIOB External Event
These two bits determine the effect on the TIOBx output pin caused by an external event. The external event source is
selected by EEVT[1:0] of the mode register. These bits are active only if TIOBx is not an input (see “EEVT[1:0]: External
Event” of the
ware Trigger” where xxx = EEVT.
• BSWTRG: TIOB Software Trigger
These two bits determine the effect on the TIOBx output pin caused by a software trigger. These bits are active only if
TIOBx is not an input (see “EEVT[1:0]: External Event” of the
See following table where xxx = SWTRG:
360
0
0
1
1
If several events that control TIOBx output (set, clear or toggle) arrive at the same time, only one has an action according to the
following priority:
1. BSWTRG (highest priority)
2. BEEVT
3. BCPC
4. BCPB
AT91SAM7A1
”GPT Mode Register in Waveform Mode” on page
Bxxx
0
1
0
1
357). See the bit description table in “BSWTRG: TIOB Software Trigger”
357). See the bit description table in “BSWTRG: TIOB Software Trigger”
Waveform Pin
None
Set
Clear
Toggle
”GPT Mode Register in Waveform Mode” on page
357). See the bit description table in “BSWTRG: TIOB Soft-
6048B–ATARM–29-Jun-06
357).
”GPT
”GPT

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