AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 32

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AT91SAM7A1-AU

Manufacturer Part Number
AT91SAM7A1-AU
Description
IC ARM7 MCU 32BIT ROMLESS144LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7A1-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7A1-AU
Manufacturer:
Atmel
Quantity:
10 000
10.4
10.4.1
10.4.1.1
32
External Bus Interface Timings
AT91SAM7A1
Read Access
Standard Read Protocol
Figure 10-6. EBI Connection for External 16-bit Memory Devices, 16-bit Access Only
If users want to boot on a RAM memory for debug purposes, the RAM memory should be con-
nected the same way as a Flash memory (NUB and NLB of the RAM memory connected to
the ground) to emulate a pure 16-bit Flash memory as shown in
Figure 10-7. EBI Connected to an External 16-bit RAM Memory Device, 16-bit Access Only
Simple read and write access cycles are explained in detail where read access can be done
through two modes:
The EBI can automatically insert wait states during the external access cycles. These wait
states are applied within the actual access cycle.
Data float wait states can also be inserted and applied between cycles. Data float wait states
depend on the previous access.
Standard read protocol (default read mode) implements a read cycle in which NRD/NOE is
active during the second half of the read cycle.
The first half of the read cycle allows time to ensure completion of the previous access, as well
as the output of address and NCS before the read cycle begins.
• Standard read protocol
• Early read protocol which increases the EBI performance for read access.
Used as a Boot Memory for Debug Purpose
EBI
EBI
D[15:0]
A[21:1]
D[15:0]
A[21:1]
NWR0
NWR0
NRD
NCS
NRD
NCS
External Memory
External Memory
D[15:0]
A[20:0]
NWE
NOE
NCE
NLB
NUB
D[15:0]
A[20:0]
NWE
NOE
NCE
16-bit RAM
16-bit
Figure
10-7.
6048B–ATARM–29-Jun-06

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