AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 270

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AT91SAM7A1-AU

Manufacturer Part Number
AT91SAM7A1-AU
Description
IC ARM7 MCU 32BIT ROMLESS144LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7A1-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7A1-AU
Manufacturer:
Atmel
Quantity:
10 000
25.2.2
270
AT91SAM7A1
Layered Structure of a CAN Node
The layered architecture of the CAN is compliant with the ISO/OSI reference model:
• Configuration flexibility
• Multicast reception with time synchronization
• System wide data consistency
• Multi-master functions
• Error detection and error signaling
• Automatic retransmission of corrupted messages as soon as the bus is idle again
• Distinction between temporary errors and permanent failures of nodes and autonomous
• The LLC sublayer is concerned with message filtering, overload notification and recovery
• The MAC sublayer represents the kernel of the CAN protocol. It presents messages
• The physical layer defines how signals are actually transmitted and deals with the
switching off of defect nodes.
management.
received from the LLC sublayer and accepts messages to be transmitted to the LLC
sublayer. The MAC sublayer is responsible for Message Framing, Arbitration,
Acknowledgement, Error Detection and Signalling. The MAC sublayer is supervised by a
management entity called Fault Confinement which is a self-checking mechanism for
distinguishing short disturbances from permanent failures.
description of bit timing, bit encoding, and synchronization. Within this description, the
physical layer is not defined, as it will vary according to the requirements of individual
applications (for example, transmission medium and signal level implementations).
6048B–ATARM–29-Jun-06

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