AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 278

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

278
AT91SAM7A1
CRC Field (Standard and Extended Format)
The CRC (Cyclic Redundancy Check) field contains the CRC sequence followed by a CRC
delimiter.
Figure 25-7. CRC Field
The frame check sequence is derived from a cyclic redundancy code best suited for frames
with bit counts less than 127 bits (BCH code).
In order to carry out the CRC calculation, the polynomial to be divided is defined as the poly-
nomial, the coefficients of which are given by the de-stuffed bit stream consisting of start of
frame, arbitration field, control field, data field (if present) and, for the 15 lowest coefficients, by
0. This polynomial is divided (the coefficients are calculated modulo 2) by the generator-
polynomial:
The remainder of this polynomial division is the CRC sequence transmitted over the bus. In
order to implement this function, a 15-bit shift register CRC_RG(14:0) can be used. If NXTBIT
denotes the next bit of the bit stream, given by the de-stuffed bit sequence from start of frame
until the end of the data field, the CRC sequence is calculated as follows:
After the transmission/reception of the last bit of the data field, CRC_RG contains the CRC
sequence.
The CRC sequence is followed by the CRC delimiter which consists of a single recessive bit.
ACK Field (Standard and Extended Format)
The ACK (acknowledgement) field is two bits long and contains the ACK slot and the ACK
delimiter. In the ACK field, the transmitting node sends two recessive bits.
A receiver that has received a valid message correctly reports this to the transmitter by send-
ing a dominant bit during the ACK slot (it sends ACK).
• CRC Sequence (Standard and Extended Format)
• CRC Delimiter (Standard and Extended Format)
CRC_RG = 0
REPEAT
UNTIL (CRC sequence starts or there is an error condition)
CRCNXT = NXTBIT EXOR CRC_RG[14]
CRC_RG[14:1] = CRC_RG[13:0]
CRC_RG[0] = 0
IF CRCNXT THEN
ENDIF
Data or Control Field
X
CRC_RG[14:0] = CRC_RG[14:0] EXOR 0x4599
15
+ X
14
+ X
10
+ X
8
+ X
7
CRC Sequence
+ X
4
CRC Field
+ X
// initialize shift register
// shift left by
// 1 position
3
+ 1
CRC Delimiter
Acknowledge Field
6048B–ATARM–29-Jun-06