AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 366

• Manufacturer Part Number: AT91SAM7A1-AU
• Description: IC ARM7 MCU 32BIT ROMLESS144LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A1-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

26.12.11 GPT Register A in Waveform Mode
Name:
Access:
Offset:
• RA[15:0]: Register A Value
When the counter reaches this value, three events occur:
26.12.12 GPT Register B in Waveform Mode
Name:
Access:
Offset:
• RB[15:0]: Register B Value
When the counter reaches this value, three events occur:
These bits are active only if TIOB is not an input (see “EEVT[1:0]: External Event” of the
Mode” on page
366
– The CPAS flag is set in the status register.
– If enabled, CPAS interrupt is generated.
– TIOAx pin can be set, clear, toggle or unchanged following bits ACPA[1:0] of the mode register.
– The CPBS flag is set in the status register.
– If enabled, CPBS interrupt is generated.
– TIOBx pin can be set, clear, toggle or unchanged following bits BCPB[1:0] of the mode register.
31
23
15
31
23
15
–
–
7
–
–
7
AT91SAM7A1
GPT_RA
Read/Write
0x84
GPT_RB
Read/Write
0x88
357).
30
22
14
30
22
14
–
–
6
–
–
6
29
21
13
29
21
13
–
–
5
–
–
5
28
20
12
28
20
12
–
–
4
–
–
4
RA[15:8]
RB[15:8]
RA[7:0]
RB[7:0]
27
19
11
27
19
11
–
–
3
–
–
3
26
18
10
26
18
10
–
–
2
–
–
2
”GPT Mode Register in Waveform
25
17
25
17
–
–
9
1
–
–
9
1
6048B–ATARM–29-Jun-06
24
16
24
16
–
–
8
0
–
–
8
0