AT91SAM7A1-AU Atmel, AT91SAM7A1-AU Datasheet - Page 367

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AT91SAM7A1-AU

Manufacturer Part Number
AT91SAM7A1-AU
Description
IC ARM7 MCU 32BIT ROMLESS144LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7A1-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
49
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
AT91SAM7A1-EK - BOARD EVAL FOR AT91SAM7A1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7A1-AU
Manufacturer:
Atmel
Quantity:
10 000
26.12.13 GPT Register C in Waveform Mode
Name:
Access:
Offset:
• RC[15:0]: Register C Value
When the counter reaches this value, seven events can occur:
6048B–ATARM–29-Jun-06
– The CPCS flag is set in the status register.
– If enabled, CPCS interrupt is generated.
– If bit CPCTRG (bit [14] of the GPTX_MR) is high, the counter is reset and restarts at 0x0000 at the next valid
– The counter clock can be disabled according to CPCDIS (bit [7] of the mode register).
– The counter can be stopped according to CPCSTOP (bit [6] of the mode register).
– TIOAx pin can be set, clear, toggle or unchanged following bits ACPC[1:0] of the mode register.
– TIOBx pin can be set, clear, toggle or unchanged following bits BCPC[1:0] of the mode register.
31
23
15
7
counter clock edge.
GPT_RC
Read/Write
0x8C
30
22
14
6
29
21
13
5
28
20
12
4
RC[15:8]
RC[7:0]
27
19
11
3
26
18
10
2
AT91SAM7A1
25
17
9
1
24
16
8
0
367

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