LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 110

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

4-22
WATN
EPC
R
AAP
Registers
Select with SATN/ on a Start Sequence
When this bit is set and the LSI53C825A is in the initiator
mode, the SATN/ signal is asserted during LSI53C825A
selection of a SCSI target device. This is to inform the
target that the LSI53C825A has a message to send. If a
selection time-out occurs while attempting to select a
target device, SATN/ deasserts at the same time SSEL/
deasserts. When this bit is clear, the SATN/ signal is not
asserted during selection. When executing SCSI
SCRIPTS, this bit is controlled by the SCRIPTS
processor, but it may be set manually in low level mode.
Enable Parity Checking
When this bit is set, the SCSI data bus is checked for odd
parity when data is received from the SCSI bus in either
the initiator or target mode. Parity is also checked as data
goes from the SCSI FIFO to the DMA FIFO. If a parity
error is detected, bit 0 of the
(SIST0)
generated.
If the LSI53C825A is operating in initiator mode and a
parity error is detected, SATN/ can optionally be
asserted, but the transfer continues until the target
changes phase. When this bit is cleared, parity errors are
not reported.
Reserved
Assert SATN/ on Parity Error
When this bit is set, the LSI53C825A automatically
asserts the SATN/ signal upon detection of a parity error.
SATN/ is only asserted in the initiator mode. The SATN/
signal is asserted before deasserting SACK/ during the
byte transfer with the parity error. The Enable Parity
Checking bit must also be set for the LSI53C825A to
assert SATN/ in this manner. A parity error is detected on
data received from the SCSI bus.
If the Assert SATN/ on Parity Error bit is cleared or the
Enable Parity Checking bit is cleared, SATN/ is not
automatically asserted on the SCSI bus when a parity
error is received.
register is set and an interrupt may be
SCSI Interrupt Status Zero
4
3
2
1