LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 35

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LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
2.2.2 DMA Core
2.2.3 SCRIPTS Processor
2.2.4 Internal SCRIPTS RAM
The LSI53C825A SCSI core is controlled by the integrated SCRIPTS
processor through a high level logical interface. Commands controlling
the SCSI core are fetched out of the main host memory or local memory.
These commands instruct the SCSI core to Select, Reselect, Disconnect,
Wait for a Disconnect, Transfer Information, Change Bus Phases and, in
general, implement all aspects of the SCSI protocol. The SCRIPTS
processor is a special high speed processor optimized for SCSI protocol.
The DMA core is a bus master DMA device that attaches directly to the
industry standard PCI Bus. The DMA core is tightly coupled to the SCSI
core through the SCRIPTS processor, which supports uninterrupted
scatter/gather memory operations.
The LSI53C825A supports 32-bit memory and automatically supports
misaligned DMA transfers. A 536-byte FIFO allows the LSI53C825A to
support 2, 4, 8, 16, 32, 64, or 128 longword bursts across the PCI bus
interface.
The SCSI SCRIPTS processor allows both DMA and SCSI commands
to be fetched from host memory or internal SCRIPTS RAM. Algorithms
written in SCSI SCRIPTS control the actions of the SCSI and DMA cores
and are executed from 32-bit system RAM. The SCRIPTS processor
executes complex SCSI bus sequences independently of the host CPU.
The SCRIPTS processor can begin a SCSI I/O operation in
approximately 500 ns. This compares with 2–8 ms required for traditional
intelligent host adapters. Algorithms may be designed to tune SCSI bus
performance, to adjust to new bus device types (such as scanners,
communication gateways, etc.), or to incorporate changes in the SCSI-2
or SCSI-3 logical bus definitions without sacrificing I/O performance.
SCSI SCRIPTS are hardware independent, so they can be used
interchangeably on any host or CPU system bus.
The LSI53C825A has 4 Kbytes (1024 x 32 bits) of internal, general
purpose RAM. The RAM is designed for SCRIPTS program storage, but
is not limited to this type of information. When the chip fetches SCRIPTS
SCSI Functional Description
2-11

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