LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 173

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

HTHSF
GEN[3:0]
Operating Registers
Note:
To reset a timer before it expires and obtain repeatable
delays, the time value must be written to zero first, and then
written back to the desired value. This is also required
when changing from one time value to another. See
Chapter 2, “Functional Description,”
how interrupts are generated when the timers expire.
Handshake-to-Handshake Timer Scale Factor
Setting this bit causes this timer to shift by a factor of 16.
Refer to the
description for details.
General Purpose Timer Period
These bits select the period of the general purpose timer.
The time measured is the time between enabling and
disabling of the timer. When this timing is exceeded, the
GEN bit in the
is set. Refer to the table under
(STIME0), bits [3:0], for the available time-out periods.
Table 4.8
1. These values are correct if the CCF bits in the
2. 50 MHz clock is not supported for Ultra2 SCSI operation.
HTH[7:4], SEL[3:0],
Control Three (SCNTL3)
valid combinations in the bit description.
GEN[3:0]
1101
1110
1111
SCSI Timer Zero (STIME0)
SCSI Interrupt Status One (SIST1)
Timeout Periods, 50 MHz Clock (Cont.)
1
GENSF = 0
register are set according to the
409.6 ms
819.2 ms
1.6 s
Minimum Timeout
(50 MHz Clock)
SCSI Timer Zero
for an explanation of
register
GENSF = 1
12.8 s
25.6 s
6.4 s
2
SCSI
register
[3:0]
4-85
4