LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 204

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

5-20
TI
SCSI SCRIPTS Instruction Set
Select, Reselect, Wait Select, and Wait Reselect
instructions. The Select and Reselect instructions can
contain an absolute alternate jump address or a relative
transfer address.
Table Indirect Mode
When this bit is set, the 24-bit signed value in the
Byte Counter (DBC)
Data Structure Address (DSA)
offset relative to the value in the
(DSA)
SCSI ID, synchronous offset and synchronous period are
loaded from this address. Prior to the start of an I/O, load
the
of the I/O data structure. Any address on a Dword
boundary is allowed. After a Table Indirect opcode is
fetched, the
the 24-bit signed offset value from the opcode to
generate the address of the required data. Both positive
and negative offsets are allowed. A subsequent fetch
from that address brings the data values into the chip.
SCRIPTS can directly execute operating system I/O data
structures, saving time at the beginning of an I/O
operation. The I/O data structure can begin on any Dword
boundary and may cross system segment boundaries.
There are two restrictions on the placement of data in
system memory:
The I/O data structure must lie within the 8 Mbytes
above or below the base address.
An I/O command structure must have all four bytes
contiguous in system memory, as shown below. The
offset/period bits are ordered as in the
(SXFER)
as in the
Data Structure Address (DSA)
Config
register. The
Data Structure Address (DSA)
SCSI Control Three (SCNTL3)
register. The configuration bits are ordered
SCSI Control Three (SCNTL3)
ID
register is added to the value in the
Offset/period
register, and used as an
Data Structure Address
with the base address
SCSI Transfer
is added to
register.
00
value,
DMA
25