LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 52

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

2.4.9.1 Differential Mode
Table 2.6
2-28
Signal
BSYDIR, SELDIR,
RSTDIR
SDIR[15:0],
SDIRP[1:0]
IGS
TGS
DIFFSENS
Differential Mode
Function
Active HIGH signals used to enable the differential drivers as outputs for SCSI
signals BSY/, SEL/, and RST/, respectively.
Active HIGH signals used to control direction of the differential drivers for SCSI
data and parity lines, respectively.
Active HIGH signal used to control direction of the differential driver for initiator
group signals ATN/ and ACK/.
Active HIGH signal used to control direction of the differential drivers for target
group signals MSG/, C/D/, I/O/, and REQ/.
Input to the LSI53C825A used to detect the presence of a SE device on a
differential system. If a logical zero is detected on this pin, then it is assumed
that an SE device is on the bus and all SCSI outputs will be 3-stated to avoid
damage to the transceiver.
In differential mode, the SDIR[15:0], SDIRP[1:0], IGS, TGS, RSTDIR,
BSYDIR, and SELDIR signals control the direction of external differential
pair transceivers. The LSI53C825A is placed in differential mode by
setting the DIF bit, bit 5 of the
Setting this bit 3-states the BSY/, SEL/, and RST/ pads so they can be
used as pure input pins. In addition to the standard SCSI lines, the
following signals defined in
operation by the LSI53C825A.
See
LSI53C825A is connected to the TI 75LBC976 differential transceiver.
The recommended value of the pull-up resistor on the REQ/, ACK/,
MSG/, C/D/, I/O/, ATN/, SD[7:0]/, and SDP0/ lines is 680
Active Negation portion of LSI Logic TolerANT technology is not enabled.
When TolerANT technology is enabled, the recommended resistor value
on the REQ/, ACK/, SD[7:0]/, and SDP0/ signals is 1.5 k . The electrical
characteristics of these pins change when TolerANT is enabled,
permitting a higher resistor value.
Functional Description
Figure 2.3
for an example differential wiring diagram, in which the
Table 2.6
SCSI Test Two (STEST2)
are used during differential
register (0x4E).
when the