LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 78

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LSI53C825AJ

Manufacturer Part Number
LSI53C825AJ
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C825AJ

Lead Free Status / RoHS Status
Not Compliant
3.1.3 Interface Control Signals
Table 3.4
3-8
Name
FRAME/
TRDY/
IRDY/
STOP/
DEVSEL/
IDSEL
Pin No.
Interface Control Signals
16
19
17
22
20
2
Table 3.4
S/T/S Cycle Frame is driven by the current master to indicate the beginning
S/T/S Target Ready indicates the target agent’s (selected device’s) ability to
S/T/S Initiator Ready indicates the initiating agent’s (bus master’s) ability to
S/T/S Stop indicates that the selected target is requesting the master to stop
S/T/S Device Select indicates that the driving device has decoded its address
Signal Descriptions
Type
I
Description
and duration of an access. FRAME/ is asserted to indicate a bus
transaction is beginning. While FRAME/ is asserted, data transfers
continue. When FRAME/ is deasserted, the transaction is in the final
data phase or the bus is idle.
complete the current data phase of the transaction. TRDY/ is used with
IRDY/. A data phase is completed on any clock when both TRDY/ and
IRDY/ are sampled asserted. During a read, TRDY/ indicates that valid
data is present on AD[31:0]. During a write, it indicates the target is
prepared to accept data. Wait cycles are inserted until both IRDY/ and
TRDY/ are asserted together.
complete the current data phase of the transaction. This signal is used
with TRDY/. A data phase is completed on any clock when both IRDY/
and TRDY/ are sampled asserted. During a write, IRDY/ indicates that
valid data is present on AD[31:0]. During a read, it indicates the master
is prepared to accept data. Wait cycles are inserted until both IRDY/ and
TRDY/ are asserted together.
the current transaction.
as the target of the current access. As an input, it indicates to a master
whether any device on the bus has been selected.
Initialization Device Select is used as a chip select in place of the
upper 24 address lines during configuration read and write transactions.
describes the signals for the Interface Control Signals group:

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