LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 213

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

5.6 Transfer Control Instructions
5.6.1 First Dword
This section describes the Transfer Control Instructions. The
configuration of the Opcode bits define which Transfer Control Instruction
to perform.
OPC [2:0]
Transfer Control Instructions
IT[1:0]
Instruction Type -
Transfer Control Instruction
The IT bit configuration (10) defines the Transfer Control
Instruction Type.
Opcode
This 3-bit field specifies the type of Transfer Control
Instruction to execute. All Transfer Control Instructions
can be conditional. They can be dependent on a
true/false comparison of the ALU Carry bit or a
comparison of the SCSI information transfer phase with
the Phase field, and/or a comparison of the First Byte
Received with the Data Compare field. Each instruction
can operate in Initiator or Target mode. Transfer Control
Instructions are shown in the following table.
OPC2
0
0
0
0
1
Jump Instruction
The LSI53C825A can do a true/false comparison of the
ALU carry bit, or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields.
If the comparisons are true, then it loads the
Byte Received (SFBR)
DMA SCRIPTS Pointer Save (DSPS)
SCRIPTS Pointer (DSP)
address of the next instruction.
OPC1
0
0
1
1
x
OPC0
0
1
0
1
x
register with the contents of the
register now contains the
Instruction Defined
Jump
Call
Return
Interrupt
Reserved
register. The
SCSI First
[31:30]
[29:27]
DMA
5-29