LSI53C825AJ LSI, LSI53C825AJ Datasheet - Page 86

• Manufacturer Part Number: LSI53C825AJ
• Manufacturer: LSI

Specifications of LSI53C825AJ

• Lead Free Status / RoHS Status: Not Compliant

Table 3.11
Table 3.12
1. The chip revisions before Revision G of the LSI53C825A (PCI Rev ID 0x14) do not support different
3-16
Mode MAD Pins
Vendor ID
Device ID
Subsystem Vendor ID
Subsystem ID
Mode MAD Pins
Vendor ID
Device ID
Subsystem Vendor ID
Subsystem ID
Subsystem Data Configurations. The
registers are hardwired to zero values.
Subsystem Data Configuration Table for the LSI53C825AE
(PCI Rev ID 0x26)
Subsystem Data Configuration Table for the LSI53C825A (PCI Rev ID 0x14)
Revision G Only
Signal Descriptions
MAD[3:1] – used to set the size of the external expansion ROM
device attached. Encoding for these pins are listed in
Offset
Offset
0x2C
0x2E
0x2C
0x2E
0x00
0x02
0x00
0x02
1
Subsystem ID (SSID)
4-hi, 6-hi
4-hi, 6-hi
Normal
Normal
0x1000
0x000F
0x1000
0x1000
0x1000
0x000F
0x0000
0x0000
Read/Write
Read/Write
4-hi, 6-lo
4-hi, 6-lo
0x000F
0x000F
0x1000
0x0000
0x0000
0x1000
0x0000
0x0000
and
Subsystem Vendor ID (SSVID)
4-low, 6-hi
4-low, 6-hi
Reserved
Reserved
–
–
–
–
–
–
–
–
Table
4-low, 6-lo
4-low, 6-lo
LSI Logic
LSI Logic
0x000F
0x000F
0x1000
0x0000
0x0000
0x1000
0x1000
0x1000
3.13.